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Arduino due 0.45 - #6114
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davecheney wants to merge 6 commits into
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Arduino due 0.45#6114davecheney wants to merge 6 commits into
davecheney wants to merge 6 commits into
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The Arduino Due (ATSAM3X8E, Cortex-M3) had no target. The SVD and generated device files were already present, so this adds the runtime, GPIO, the UART on the programming port, and the board pin map from ArduinoCore-sam variant.cpp. Tested on hardware with blinky1, time.Sleep, and serial in both directions. The SAM3X8E has the sam build tag but none of the SAMD peripherals, so the shared SAMD I2C, SPI, USB and device ID files now exclude atsam3x. I2C, SPI, PWM, ADC and native USB are left for later PRs. Flashing uses bossac through the programming port. Upstream BOSSA 1.9 does not reset the chip after a flash on Linux because it closes the port right after the reset write. The bossac 1.6.1-arduino that ships with the Arduino IDE waits 100 ms and works. The flash command omits -U because the two versions spell that option differently.
The Mega and Zero board files name the analog pins ADC0 and up, and drivers examples such as the ITDB02 shield demo in tinygo-org/drivers#926 use those names. The Due now has the same names as aliases of A0 to A11.
SPI lets SPI displays and sensors work on the Arduino Due without the shield pins. Tested on hardware with a logic analyser: all four modes on the wire, clock rates from 329 kHz to 42 MHz, all 256 byte values, and CS timing around the transfer. Reads were tested with the SPI local loopback in all modes and rates. An ILI9341 init sequence was decoded correctly on the wire. The clock divider rounds so the clock never exceeds the request, so 100 kHz gives 329 kHz, the lowest rate the hardware supports. LSB first is not supported by the peripheral and returns an error. Only SPI0 on the SPI header is supported.
At 42 MHz the CPU loop could not keep the SPI busy. A full ILI9341 screen fill took 53 ms where the bus needs 29 ms. With DMA it takes 34 ms. The display showed correct colors at 8, 12, 21 and 42 MHz. Only write-only Tx of 16 bytes or more from SRAM uses DMA, because the setup costs more than it saves for short writes. Below 21 MHz the CPU loop already kept up, and DMA is about 1% slower there because of the setup per 64 byte call that the ili9341 driver makes. A 5000 byte write was tested in loopback at all rates, which also covers the split into 4095 byte DMA blocks. DMA channel 0 is now used by SPI0. There is no DMA channel allocator yet, so other DMA users must avoid it.
The ws2812 driver in tinygo.org/x/drivers needs these on Cortex-M targets to bit-bang the data line. Other SAM, nRF and STM32 targets already have them, so this adds no new API. A string of 10 WS2813 LEDs on D6 worked with the 84 MHz timing from the ws2812-due branch of davecheney/drivers.
I2C lets the Arduino Due use I2C sensors and displays. I2C0 is TWI1 on SDA and SCL (D20, D21), which Arduino calls Wire, and I2C1 is TWI0 on SDA1 and SCL1, which Arduino calls Wire1. Tested on hardware: bus scans and NACK handling on both buses at 100 and 400 kHz, and a PCF8574 HD44780 backpack on I2C0 at 3.3V and 5V. The backpack was found at the right address with no false hits, writes and 1 and 2 byte reads worked, and the hd44780i2c driver showed text. A logic analyser showed correct START, address, NACK and STOP frames and 5 us clock halves at 100 kHz. A 64x48 SSD1306 module did not work on the TWI, while a bit-banged scan on the same wires found it. The TWI changes SDA about 100 ns after SCL falls and has no hold time setting, so modules with slow SCL edges may misread the bus. This needs more work with a module that shows the problem. Configure recovers a bus that a target holds low by clocking SCL, as in UM10204 section 3.1.16. A write and read with up to 3 write bytes uses the TWI internal address for a repeated start. Longer writes are sent with a STOP before the read. Above 100 kHz the clock low time is 2/3 of the period to meet the 1.3 us Fast mode minimum.
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