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machine/esp32: do not yield in UART writeByte from an interrupt - #6116

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davecheney:esp32-uart-irq-gosched
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davecheney:esp32-uart-irq-gosched

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runtime.Gosched has no interrupt check, so a println from an interrupt handler with a full TX FIFO would switch tasks, or take schedulerLock with the cores scheduler, from interrupt context. Busy-wait there instead, as machine_rp2_uart.go and machine_py32_uart_common.go already do.

runtime.Gosched has no interrupt check, so a println from an interrupt handler with a full TX FIFO would switch tasks, or take schedulerLock with the cores scheduler, from interrupt context. Busy-wait there instead, as machine_rp2_uart.go and machine_py32_uart_common.go already do.
@davecheney davecheney added this to the 0.45 milestone Oct 31, 2026
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davecheney requested review from deadprogram and a balanced review from Copilot October 31, 2026 01:51

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🟢 Approval recommended

No active review issues are reported for the ESP32 UART interrupt-context change.

No open issues 🎉

What changed in this PR

Prevents ESP32 UART writes from yielding to the scheduler in interrupt context when the transmit FIFO is full.

Changes:

  • Busy-waits inside interrupts while preserving scheduler yields outside interrupts.
  • Aligns ESP32 behavior with the RP2 and PY32 UART implementations.
File Description
src/​machine/​machine_esp32.go Guards gosched() with !interrupt.In() in UART writeByte.

Review effort: Balanced

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